According to developments, improvement in speed and improvement in functionality of semiconductor device (LSI) processes, the power noise of LSI has been increased. This is because a power voltage is decreased as the semiconductor manufacturing process proceeds, and the flowing current is increased when the power consumption is same. More particularly, when denoting the power current by I, power consumption by W and power source by V, to decrease one of I and V increases the other with same power consumption W from the relation of W=IV.
Further, along with advances in semiconductor manufacturing processes, clock frequency has been increased and therefore the induced electromotive force (V) becomes as the following.V=L(dI/dt)  (Equation 1).
Here, “L” denotes an inductance of a power supply system, “I” denotes a current waveform of a power distribution system, and d/dt denotes temporal differentiation. According to the relation of (Equation 1), switching time of signals becomes shorter in LSIs improved in speed, and thus, fluctuating time of the power current (I) becomes shorter. Consequently, large power noise will be generated even with a small inductance (L) component of the power supply system.
To respond to the generation of power noise, there are techniques for arranging a decoupling capacitor on a surface of a circuit wiring layer of a semiconductor chip in a semiconductor device as disclosed in Japanese Patent Application Laid-Open Publication No. 2002-170920 (Patent Document 1) and Japanese Patent Application Laid-Open Publication No. 2003-332515 (Patent Document 2). In addition, there is a technique for mounting a decoupling capacitor on a same layer of solder balls of a package as disclosed in Japanese Patent Application Laid-Open Publication No. 2006-173407 (Patent Document 3).